CVE-2020-10255

CRITICAL

DDR4 and LPDDR4 DRAM - Many-sided RowHammer via Target Row Refresh Bypass

Title source: llm
STIX 2.1

Description

Modern DRAM chips (DDR4 and LPDDR4 after 2015) are affected by a vulnerability in deployment of internal mitigations against RowHammer attacks known as Target Row Refresh (TRR), aka the TRRespass issue. To exploit this vulnerability, the attacker needs to create certain access patterns to trigger bit flips on affected memory modules, aka a Many-sided RowHammer attack. This means that, even when chips advertised as RowHammer-free are used, attackers may still be able to conduct privilege-escalation attacks against the kernel, conduct privilege-escalation attacks against the Sudo binary, and achieve cross-tenant virtual-machine access by corrupting RSA keys. The issue affects chips produced by SK Hynix, Micron, and Samsung. NOTE: tracking DRAM supply-chain issues is not straightforward because a single product model from a single vendor may use DRAM chips from different manufacturers.

References (6)

Core 6
Core References
Third Party Advisory x_refsource_misc
https://download.vusec.net/papers/trrespass_sp20.pdf
Third Party Advisory x_refsource_misc
https://www.vusec.net/projects/trrespass/
Third Party Advisory x_refsource_misc
https://twitter.com/vu5ec/status/1237399112590467072
Third Party Advisory x_refsource_misc
https://twitter.com/antumbral/status/1237425959407513600

Scores

CVSS v3 9.0
EPSS 0.0154
EPSS Percentile 81.6%
Attack Vector NETWORK
CVSS:3.1/AV:N/AC:H/PR:N/UI:N/S:C/C:H/I:H/A:H

Details

CWE
CWE-20
Status published
Products (6)
micron/ddr4_sdram
micron/lpddr4
samsung/ddr4
samsung/lpddr4
skhynix/ddr4_sdram
skhynix/lpddr4
Published Mar 10, 2020
Tracked Since Feb 18, 2026