CVE-2020-24512

LOW

Intel(R) Processors - Info Disclosure

Title source: llm
STIX 2.1

Description

Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.

References (5)

Core 5
Core References
Third Party Advisory x_refsource_confirm
https://security.netapp.com/advisory/ntap-20210611-0005/
Third Party Advisory vendor-advisory x_refsource_debian
https://www.debian.org/security/2021/dsa-4934
Third Party Advisory mailing-list x_refsource_mlist
https://lists.debian.org/debian-lts-announce/2021/07/msg00022.html
Third Party Advisory x_refsource_confirm
https://cert-portal.siemens.com/productcert/pdf/ssa-309571.pdf

Scores

CVSS v3 3.3
EPSS 0.0019
EPSS Percentile 40.9%
Attack Vector LOCAL
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:L/I:N/A:N

Details

CWE
CWE-203
Status published
Products (5)
debian/debian_linux 10.0
intel/microcode < 20210608
netapp/fas\/aff_bios
netapp/hci_compute_node_bios
netapp/solidfire_bios
Published Jun 09, 2021
Tracked Since Feb 18, 2026