CVE-2022-34643
MEDIUMRISCV ISA Sim - Improper Handling of Exceptional Conditions in Memory Access
Title source: llmDescription
RISCV ISA Sim commit ac466a21df442c59962589ba296c702631e041b5 implements the incorrect exception priotrity when accessing memory.
References (1)
Core 1
Core References
Exploit, Issue Tracking, Patch, Third Party Advisory x_refsource_misc
https://github.com/riscv-software-src/riscv-isa-sim/issues/971
Scores
CVSS v3
5.5
EPSS
0.0021
EPSS Percentile
11.6%
Attack Vector
LOCAL
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
Details
CWE
CWE-755
Status
published
Products (1)
riscv/spike_risc-v_isa_simulator
Published
Jul 18, 2022
Tracked Since
Feb 18, 2026