CVE-2023-31315
HIGHAMD Processors Model Specific Register - SMM Configuration Code Execution
Title source: manualDescription
Improper validation in a model specific register (MSR) could allow a malicious program with ring0 access to modify SMM configuration while SMI lock is enabled, potentially leading to arbitrary code execution.
References (4)
Core 4
Core References
Various Sources
https://news.ycombinator.com/item?id=41475975
Various Sources
https://www.darkreading.com/remote-workforce/amd-issues-updates-for-silicon-level-sinkclose-flaw
Vendor Advisory vendor-advisory
https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7014.html
Scores
CVSS v3
7.5
EPSS
0.0003
EPSS Percentile
9.5%
Attack Vector
LOCAL
CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H
CISA SSVC
Vulnrichment
Exploitation
none
Automatable
no
Technical Impact
total
Details
CWE
CWE-94
Status
published
Products (36)
AMD/1st Gen AMD EPYC™ Processors
various - Naples PI 1.0.0.M
AMD/2nd Gen AMD EPYC™ Processors
various - Rome PI 1.0.0.J
AMD/3rd Gen AMD EPYC™ Processors
various - Milan PI 1.0.0.D
AMD/4th Gen AMD EPYC™ Processors
various - Genoa PI 1.0.0.C
AMD/AMD Athlon™ 3000 Series Mobile Processors with Radeon™ Graphics
various - Picasso-FP5 1.0.1.2
AMD/AMD Athlon™ 3000 Series Mobile Processors with Radeon™ Graphics
various - PollockPI-FT5 1.0.0.8
AMD/AMD EPYC™ Embedded 3000
various
AMD/AMD EPYC™ Embedded 7002
various
AMD/AMD EPYC™ Embedded 7003
various
AMD/AMD EPYC™ Embedded 9003
various - EmbGenoaPI 1.0.0.7
... and 26 more
Published
Aug 12, 2024
Tracked Since
Feb 18, 2026