CVE-2025-51677

CRITICAL

openRISC OR1200 commit 83ac6b - Logic Mismatch and Unexpected Behavior via RTL-Netlist Output Port Mismatch

Title source: llm
STIX 2.1

Description

An issue was discovered in openRISC OR1200 commit 83ac6b. An output mismatch between the RTL and the netlist of the or1200 cpu output port can lead to unexpected behavior.

Scores

CVSS v3 9.1
EPSS 0.0043
EPSS Percentile 35.5%
Attack Vector NETWORK
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:N/I:H/A:H

CISA SSVC

Vulnrichment
Exploitation none
Automatable yes
Technical Impact partial

Details

CWE
CWE-116
Status published
Published Jul 17, 2026
Tracked Since Jul 18, 2026